There are two processors that currently we already know, namely RISC (Reduce Instruction Set Computer) and CISC (Complex Instruction Set Computer). CISC processors have complex instructions for ease of writing assembly language programs, while the RISC processor has simple instructions that can be executed quickly to simplify the implementation of the internal control circuit processor.
Therefore, RISC processors can be made in the area of semiconductor chip Relatively narrow the number of components is less than CISC processors. Orientation difference between the two processors is causing the difference in the overall system, including the design kompilatornya.
While Superscalar processors generally use multiple functional units, creating a parallel path where many different instructions can be executed in parallel. With such an arrangement, it is possible to start the execution of multiple instructions in parallel every clock cycle. Of course, the parallel execution of the program must maintain the truth of this logic, so the results should be the same as the result of a serial execution
CISC stands for Complex Intruction Set Computer wherein the processor has a set of complex instructions and complete. CISC itself is a form of architecture which underwent several low-level instructions. For example, the low-level instructions are arithmetic operations, storage-retrieval of memory etc..
CISC instruction does have a complex and is considered influential in slower performance. CISC instruction set that offers a powerful, strong, tough, would not be surprised if CISC asembly language is only known that he actually addressed to the programmer. Therefore, just requires a bit CISC instructions to walk.
So actually the main goal of CISC architecture is executing a command quite a few lines of machine language as little as possible. This can be achieved by making the hardware processor is able to understand and execute a series of operations. For purposes of our example this time, a CISC processor is equipped with a special instruction, which we named MULT. When executed, the instruction will read the two values and store them into 2 different registers yag, do multiplication operands in the execution unit again and then returns the results to the appropriate register. So his instructions pretty one.
RISC and CISC difference when sorting execution
CISC and RISC difference was not significant if only seen from the terminology of complex instruction set or not (reduced).
More than that, RISC and CISC architecture differ in philosophy. CISC architectural philosophy is to move the software to the hardware complexity.
Current IC manufacturing technologies allow for set thousands and even millions of transistors inside the dice. Assortment instructions approaching high-level language programmers can be made in order to facilitate the programmer to make programs. Some CISC processors typically have internal firmware microcode in the form of his chips are useful to translate the macro instructions. This mechanism could slow instruction execution, yet effective way to make complex instructions. For certain applications that require singlechip computer, CISC processors could be an option.
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